NDLI: Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions

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Yield-Aware Cache Architectures

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Merging Head and Tail Duplication for Convergent Hyperblock Formation

Data-Dependency Graph Transformations for Superblock Scheduling

Dataflow Predication

Authentication Control Point and Its Implications For Secure Processor Design

Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection

Memory Protection through Dynamic Access Control

LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks

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A Predictive Performance Model for Superscalar Processors

Serialization-Aware Mini-Graphs: Performance with Fewer Resources

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Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers

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Support for High-Frequency Streaming in CMPs

Fire-and-Forget: Load/Store Scheduling with No Store Queue at All

NoSQ: Store-Load Communication without a Store Queue

DMDC: Delayed Memory Dependence Checking through Age-Based Filtering

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Memory Prefetching Using Adaptive Stream Detection

Scalable Cache Miss Handling for High Memory-Level Parallelism

Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches

Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions

ASR: Adaptive Selective Replication for CMP Caches

Managing Distributed, Shared L2 Caches through OS-Level Page Allocation

Die Stacking (3D) Microarchitecture

Distributed Microarchitectural Protocols in the TRIPS Prototype Processor

Leveraging Optical Technology in Future Bus-based Chip Multiprocessors

Mitigating the Impact of Process Variations on Processor Register Files and Execution Units

Author Index

Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions

Content Provider	ACM Digital Library
Author	Varadarajan, Keshavan Nandy, S. K. Iyer, Ravi Newell, Donald Makineni, Srihari Sharda, Vishal Bharadwaj, Amrutur
Abstract	CMPs enable simultaneous execution of multiple applications on the same platforms that share cache resources. Diversity in the cache access patterns of these simultaneously executing applications can potentially trigger inter-application interference, leading to cache pollution. Whereas a large cache can ameliorate this problem, the issues of larger power consumption with increasing cache size, amplified at sub-100nm technologies, makes this solution prohibitive. In this paper, in order to address the issues relating to power-aware performance of caches, we propose a caching structure that addresses the following: 1. Definition of application-specific cache partitions as an aggregation of caching units (molecules). The parameters of each molecule namely size, associativity and line size are chosen so that the power consumed by it and access time are optimal for the given technology. 2. Application-Specific resizing of cache partitions with variable and adaptive associativity per cache line, way size and variable line size. 3. A replacement policy that is transparent to the partition in terms of size, heterogeneity in associativity and line size. Through simulation studies we establish the superiority of molecular cache (caches built as aggregations of molecules) that offers a 29% power advantage over that of an equivalently performing traditional cache.
Starting Page	433
Ending Page	442
Page Count	10
File Format	PDF
ISBN	0769527329
ISSN	10724451
DOI	10.1109/MICRO.2006.38
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2006-12-09
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

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Molecular Caches: A Caching Structure For Dynamic Creation Of Application-specific Heterogeneous Cache Regions

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