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Content Provider | IET Digital Library |
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Author | Xia, Lanhua Wu, Jianhui Huang, Cheng Zhang, Meng |
Abstract | A defect-oriented built-in self-test (BIST) structure of charge-pump phase-locked loop (CP-PLL) for high fault coverage and low area overhead test solution is proposed. It employs a new structure of phase/frequency detector, a D flip-flop and some existing blocks in the PLL as the input stimulus generator and fault feature extracted devices for testing evaluation. Thus, no extra test stimulus or high-performance measured instruments are required for test. The structure is easily implemented and has a little influence on the performance of CP-PLL. Fault simulation results indicate that the proposed BIST structure has high fault coverage (98.75%) and low area overhead (0.78%). |
Starting Page | 317 |
Ending Page | 321 |
Page Count | 5 |
ISSN | 1751858X |
Volume Number | 10 |
e-ISSN | 17518598 |
Issue Number | Issue 4, Jul (2016) |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-cds/10/4 |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2015.0224 |
Journal | IET Circuits, Devices & Systems |
Publisher Date | 2016-07-01 |
Access Restriction | Open |
Rights Holder | © The Institution of Engineering and Technology |
Subject Keyword | Analogue Circuit BIST Structure Built-in Self Test Charge Pump Circuit Charge Pump Phase Locked Loop D Flip-flop Defect-oriented Built-in Self-test Structure Demodulator Discriminators And Mixers Fault Coverage Fault Detection Fault Simulation Feature Extracted Device Flip Flops Frequency Detector Logic Circuit Modulator Overhead Test Solution Phase Detector Phase Locked Loop Power Electronics Power Supply Stimulus Generator Supervisory Circuit |
Content Type | Text |
Resource Type | Article |
Subject | Control and Systems Engineering Electrical and Electronic Engineering |
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