NDLI: Robust phase locked-loop algorithm for single-phase utility-interactive inverters

Content Provider	IET Digital Library
Author	Elrayyah, Ali Sozer, Yilmaz Elbuluk, Malik
Abstract	An accurate, robust and efficient transport-delay based phase-lock loop (TDPLL) algorithm is proposed for single phase utility interactive inverters. The traditional TDPLL has low complexity and its transient response is smooth, but its performance is significantly affected by the change in the grid frequency. The proposed TDPLL is designed to have robustness against grid frequency variations. The proposed method uses two delays instead of one to cancel the grid frequency variation effect. Since the grid voltage could be polluted by harmonics and may suffer from sag/swell anomalies, the proposed method is enhanced further to be robust against these sources of disturbances. Moreover, a method is proposed to tune the parameters of the system. The performance of the proposed PLL is validated through simulations and experimental results.
Starting Page	1064
Ending Page	1072
Page Count	9
ISSN	17554535
Volume Number	7
e-ISSN	17554543
Issue Number	Issue 5, May (2014)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-pel/7/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-pel.2013.0351
Journal	IET Power Electronics
Publisher Date	2014-01-06
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Analogue Circuit Delay Lock Loops Demodulator Discriminators And Mixers Grid Frequency Variation Effect Harmonics Pollution Invertors Modulator Phase Locked Loop Power Electronics Power Supply Power Supply Circuit Power Supply Quality Sag-swell Anomaly Single Phase Utility Interactive Inverter Supervisory Circuit TDPLL Algorithm Transient Response Transport-delay Based Phase-lock Loop Algorithm
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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