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| Content Provider | IET Digital Library |
|---|---|
| Author | Almurib, Haider Abbas F. Kumar, Thulasiraman Nandha Lombardi, Fabrizio |
| Abstract | This study presents the detailed design and analysis of a new memristor-based look-up table (LUT) for field programmable gate arrays (FPGAs). The proposed memory utilises memristors as storage elements with N-type metal–oxide–semiconductor transistors for row access. New WRITE and READ operations are proposed; the proposed LUT requires no additional circuit to handle the WRITE 1 (0) operation. The proposed method requires a RESTORE pulse only for the READ 0 operation. Moreover, the WRITE operation of the proposed method requires three power lines and a RESTORE pulse only for the READ 0 operation, thus saving 25% READ time when compared with previous methods. In addition, the proposed method does not require the REFRESH pulse and does not dissipate power during stand-by mode. Extensive simulation results are presented with respect to different operational features such as normalised state parameter, pulse width and LUT size. In addition to a circuit-level evaluation, the proposed LUT scheme has also been assessed with respect to FPGA implementation. Simulation results using sequential benchmarks mapped on Spartan 4 and 5 FPGAs show that the proposed non-volatile LUT outperforms existing static random access memory cell-based LUTs in terms of performance. |
| Starting Page | 292 |
| Ending Page | 300 |
| Page Count | 9 |
| ISSN | 1751858X |
| Volume Number | 10 |
| e-ISSN | 17518598 |
| Issue Number | Issue 4, Jul (2016) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-cds/10/4 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2015.0217 |
| Journal | IET Circuits, Devices & Systems |
| Publisher Date | 2016-07-01 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Bit Line Circuit-level Evaluation Field Programmable Gate Array FPGA Insulated Gate Field Effect Transistors Logic And Switching Circuit Logic Circuit Memristor-based Look-up Table Memristors MOSFET N-type Metal-oxide-semiconductor Transistors Nonvolatile Field Programmable Gate Array Nonvolatile LUT READ 0 Operation READ Operation Resistor RESTORE Pulse Sequential Benchmarks Sequential Circuit Spartan 4 Storage Element Table Lookup Word Line Write Operation |
| Content Type | Text |
| Resource Type | Article |
| Subject | Control and Systems Engineering Electrical and Electronic Engineering |
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