NDLI: DC modelling of SOI four-gate transistor (G4FET) for implementation in circuit simulator using multivariate regression polynomial

Content Provider	IET Digital Library
Author	Hasan, Md Sakib Islam, Syed K.
Abstract	An efficient numerical model of silicon-on-insulator (SOI) four-gate transistors (G4FET) and its implementation in circuit simulator is presented here. A set of available data for different operating conditions is used to empirically determine the parameters of this model and a different set of test data is used to verify its predictive accuracy. This DC model is used to express the drain current as a single multivariate regression polynomial with its validity spanning across different possible operating regions as long as the chosen independent variables lie within the range of data set used to develop the model. The continuity of the polynomial model and its derivatives makes it particularly suitable for implementation in a circuit simulator. Models for both n-channel and p-channel G4FETs have been developed and validated using TCAD and experimental data and are successfully implemented in SPICE simulator for simulating two experimentally demonstrated G4FET circuits.
Starting Page	12
Ending Page	20
Page Count	9
ISSN	1751858X
Volume Number	13
e-ISSN	17518598
Issue Number	Issue 1, Jan (2019)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/13/1
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2018.0059
Journal	IET Circuits, Devices & Systems
Publisher Date	2018-04-27
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Circuit Simulator DC Modelling Design And Testing Drain Current Equivalent Circuit Field Effect Device Field Effect Transistors Interpolation And Function Approximation Multivariate Regression Polynomial Model N-channel G4FETs Numerical Analysis Numerical Model P-channel G4FETs Polynomial Predictive Accuracy Regression Analysis Semiconductor Device Model Semiconductor Device Modelling Silicon-on-insulator Silicon-on-insulator Four-gate Transistors SOI Four-gate Transistor SPICE Simulator Statistics TCAD Test Data
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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