NDLI: Area–delay and energy efficient multi-operand binary tree adder

Content Provider	IET Digital Library
Author	Patel, Sujit Kumar Singhal, Subodh Kumar
Abstract	Here, the critical path of ripple carry adder (RCA)-based binary tree adder (BTA) is analysed to find the possibilities for delay minimisation. Based on the findings of the analysis, the new logic formulation and the corresponding design of RCA are proposed for the BTA. The comparison result shows that the proposed RCA design offers better efficiency in terms of area, delay and energy than the existing RCA. Using this RCA design, the BTA structure is proposed. The synthesis result reveals that the proposed 32-operand BTA provides the saving of 22.5% in area–delay product and 28.7% in energy–delay product over the recent Wallace tree adder which is the best among available multi-operand adders. The authors have also applied the proposed BTA in the recent multiplier designs to evaluate its performance. The synthesis result shows that the performance of multiplier designs improved significantly due to the use of proposed BTA. Therefore, the proposed BTA design can be a better choice to develop the area, delay and energy efficient digital systems for signal and image processing applications.
Starting Page	586
Ending Page	593
Page Count	8
ISSN	1751858X
Volume Number	14
e-ISSN	17518598
Issue Number	Issue 5, Aug (2020)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/14/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2019.0443
Journal	IET Circuits, Devices & Systems
Publisher Date	2020-02-17
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	32-operand BTA Adder Algebra BTA Design Carry Logic Combinatorial Mathematics Digital Arithmetic Method Digital Circuit Design, Modelling And Testing Electrical/electronic Equipment Energy Efficient Digital System Energy Utilisation Energy–delay Product Graph Theory Logic And Switching Circuit Logic Circuit Logic Design Method Logic Formulation Low Power Electronics Mathematics Minimisation Multioperand Adders Multiplier Designs Multiplying Circuit Optimisation Technique RCA Design RCA-based BTA Ripple Carry Adder-based Binary Tree Adder Set Theory Trees Wallace Tree Adder
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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