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| Content Provider | IET Digital Library |
|---|---|
| Author | Huang, Cheng Mok, Philip K. T. |
| Abstract | A shunt-regulation control technique is presented to improve the load transient performance of fully integrated high-frequency converters. The undershoot voltage, which used to be limited by the system loop response and the nanofarad range small on-chip capacitor, is significantly suppressed. The proposed converter is simulated by a standard 0.13 μm CMOS process using a 6 nH inductor and 10 nF capacitor under different process corners with parasitics extracted from the layout of critical blocks. Compared to a conventional converter with the bandwidth pushed to the limit, the undershoot voltage is reduced from 360 to 100 mV with a transient step of 150–550 mA in 100 ps. |
| Starting Page | 96 |
| Ending Page | 97 |
| Page Count | 2 |
| ISSN | 00135194 |
| Volume Number | 51 |
| e-ISSN | 1350911X |
| Issue Number | Issue 1, Jan (2015) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/el/51/1 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/el.2014.2171 |
| Journal | Electronics Letters |
| Publisher Date | 2014-12-17 |
| Access Restriction | Open |
| Rights Holder | © The Institution of Engineering and Technology |
| Subject Keyword | Capacitance 10 NF CMOS Integrated Circuit CMOS Process Current 150 MA to 550 MA DC-DC Power Converter Fully Integrated DC–DC Converters Fully Integrated High-frequency Converter Fully Integrated Pulse-width Modulated Switching Converter Load Transient Performance Nanofarad Range Small On-chip Capacitor Power Electronics Power Supply Process Corners PWM Power Converter Shunt-regulation Control Technique Size 0.13 Mum Supervisory Circuit Switching Converter System Loop Response Time 100 Ps Undershoot Suppression Technique Undershoot Voltage Suppression Voltage Control |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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