NDLI: Digital bilinear feedback for low-power double-sampling sigma

Content Provider	IET Digital Library
Author	Bock, M. De Rombouts, P.
Abstract	A novel double-sampling (DS) technique for use in sigma–delta modulators (ΣΔMs) is presented. The proposed technique uses a digital bilinear filter in the feedback path of the modulator loop. The bilinear filter suppresses the quantisation noise folding (QNF) that results from the DS path mismatch. Unlike other solutions for the QNF, the digital implementation of this filter allows the sharing of the input sampling capacitor with the feedback sampling capacitor without any additional analogue gain stages. This way, the power consumption in the input signal buffer can be greatly reduced, because it benefits from the nullator effect at the input of the ΣΔM loop, and hence the current needed to drive the shared sampling capacitor is drastically reduced. Moreover, the proposed DS technique is also suitable for a single-ended circuit implementation of DS.
Starting Page	27
Ending Page	29
Page Count	3
ISSN	00135194
Volume Number	51
e-ISSN	1350911X
Issue Number	Issue 1, Jan (2015)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/51/1
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2014.3016
Journal	Electronics Letters
Publisher Date	2014-12-18
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	A/D And D/A Convertor Circuit Feedback Circuit Noise Digital Bilinear Feedback Digital Bilinear Filter Digital Filter Double-sampling Path Mismatch Electromagnetic Compatibility Feedback Path Feedback Sampling Capacitor Input Sampling Capacitor Input Signal Buffer Interference Interference Suppression Low Power Electronics Low-power Double-sampling Sigma-delta Modulators Modulator Loop Power Consumption QNF Quantisation Noise Folding Suppression Sigma-delta Modulation Single-ended Circuit
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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