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Content Provider | IEEE Xplore Digital Library |
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Author | Xinxi Zhang Yong Li Jinyang Wang Yulin Chen |
Copyright Year | 2009 |
Description | Author affiliation: Department of Control Engineering, Academy of Armored Force Engineering, Beijing 100072, China (Xinxi Zhang; Yong Li; Jinyang Wang; Yulin Chen) |
Abstract | A high-speed image processing system is designed in this paper in order to resolve the problems such as low system integration, slow-speed processing existing in image processing of vehicle-loaded computer. The system realizes functions of image acquisition, memorizing and overlapping by configuring Nios II soft core CPU and function modules such as image preprocessing, processing and display to build main hardware on a FPGA chip and by designing of system software. Due to using programmable chips and parallel processing technology, the system has high integration, good maintenance, quick image processing speed and strong real-time capability. |
File Size | 164881 |
File Format | |
ISBN | 9781424438631 |
DOI | 10.1109/ICEMI.2009.5274670 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2009-08-16 |
Publisher Place | China |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Process design Real time systems Image resolution Image processing FPGA Nios II CPU Computer displays Software design Image Processing Parallel processing Hardware System software Field programmable gate arrays |
Content Type | Text |
Resource Type | Article |
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