NDLI: Variation-Aware, Library Compatible Delay Modeling Strategy

Content Provider	IEEE Xplore Digital Library
Author	Guerra e. Silva, L. Zhenhai Zhu Phillips, J.R. Miguel Silveira, L.
Copyright Year	2006
Description	Author affiliation: Dept. of Informatics, Tech. Univ. Lisbon, Lisboa (Guerra e Silva, L.)
Abstract	Variability in digital integrated circuits makes timing verification an increasingly challenging task. Statistical static timing analysis has been proposed as a solution to this problem, but most of the work has concentrated in the development of timing engines for computing delay propagation. Such tools rely on the availability of delay formulas accounting for both cell and interconnect delay. In this paper, we concentrate on the impact of interconnect on delay and propose an extension to the standard modeling strategies that is variation-aware and compatible with such statistical engines. Our approach, based on a specific type of perturbation analysis, allows for the analytical computation of the quantities needed for statistical delay propagation. We also show how perturbation analysis can be performed when only the standard delay table lookup models are available for the standard cells. Results from applying our proposed modeling strategy to computing delays and slews in several instances accurately match similar results obtained using electrical level simulation
Starting Page	122
Ending Page	127
File Size	1609495
Page Count	6
File Format	PDF
ISBN	3901882197
DOI	10.1109/VLSISOC.2006.313215
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-16
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	IFIP
Subject Keyword	Laboratories Integrated circuit interconnections Delay estimation Closed-form solution Libraries Timing Performance analysis Table lookup Engines Propagation delay
Content Type	Text
Resource Type	Article

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