NDLI: An s-domain based framework for accurate and efficient static waveform analysis

Content Provider	IEEE Xplore Digital Library
Author	Shebaita, A. Petranovic, D. Ismail, Y.
Copyright Year	2009
Description	Author affiliation: IBM (Shebaita, A.) \|\| Mentor Graphics (Petranovic, D.) \|\| Nanoelectronics integrated systems Northwestern University/Nile University (Ismail, Y.)
Abstract	A novel methodology for accurate and efficient static timing analysis is presented in this paper. The novel methodology uses the traditional cell library table structure with one modification, instead of filling the cell library tables with the 50% delay and slew of the gate output signal, the cell library tables are filled with the gate output signal moments. This approach eliminates the error due to the ramp approximation at the gate output which is based only on the 50% delay and slew. Simple convolution of the gate output moments by the interconnect moments yields the signal moments at the stage output. The parameters of the gate input signal, which are used for the table access of the successive stage, are directly computed from the predecessor stage output moments using closed form expressions. Thus, the interconnects and the gates are uniformly treated in a moment-based homogeneous framework. The novel approach inherits the classical cell library tables approach efficiency with even reduced computation complexities. As compared to the classical cell library table approach, the proposed approach accounts for the increasingly nonlinear waveform shapes and provides accuracy and flexibility in the path performance calculations. Increasing the accuracy in the novel approach is made flexible by simply using more moments. To illustrate the concept and prove its merits, multiple examples are presented with 2–3 moments which maintain accuracy within 1–3% versus 10–20% for the classical cell library table approach as compared to SPICE.
Starting Page	1
Ending Page	6
File Size	653490
Page Count	6
File Format	PDF
ISBN	9781424457489
e-ISBN	9781424457502
DOI	10.1109/IDT.2009.5404146
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-11-15
Publisher Place	Saudi Arabia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Graphics Integrated circuit interconnections Capacitance Density functional theory Libraries Inverters Filling Timing Propagation delay Nanoelectronics
Content Type	Text
Resource Type	Article

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