NDLI: A Predominant Routing for on-chip networks

Content Provider	IEEE Xplore Digital Library
Author	Asad, A. Seyrafi, M. Zonouz, A.E. Soryani, M. Fathy, M.
Copyright Year	2009
Description	Author affiliation: Faculty of Computer Engineering, Iran University of Science & Technology (Asad, A.; Seyrafi, M.; Zonouz, A.E.; Soryani, M.; Fathy, M.)
Abstract	It is necessary to suppress the average delay to low when a packet is forwarded from a source node to a destination node in Network-on-Chip (NoC) for the quality maintenance of the communication between nodes. Routing algorithms have a prominent impact on communication quality and performance in on chip interconnection networks. In this paper, we present a novel routing method called Predominant Routing which can select the best route for communication flows using a simple setup network. In the setup network time, a number of low-latency virtual point-to-point connections are provided to construct the best route at run time when a new flow (a connection between a source and its destination to carry messages) is detected. Evaluation results show that the proposed routing algorithm consumes low power and approach to extremely low latency in packet switched Networks-on-Chip.
Starting Page	1
Ending Page	6
File Size	1162826
Page Count	6
File Format	PDF
ISBN	9781424457489
e-ISBN	9781424457502
DOI	10.1109/IDT.2009.5404103
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-11-15
Publisher Place	Saudi Arabia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Packet switching Adaptive systems Multiprocessor interconnection networks Switches Power system economics Routing Adaptive Routing Delay Networks on Chip (NoC) Network-on-a-chip Deterministic Routing Computer networks System-on-a-chip on-Chip Interconnection Networks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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