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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Qi Guo Tianshi Chen Haihua Shen Yunji Chen Weiwu Hu |
| Copyright Year | 2010 |
| Abstract | As a primary method for functional verification of microprocessors, simulation-based verification has received extensive studies over the last decade. Most investigations have been dedicated to the generation of stimuli (test cases), while relatively few has focused on explicitly reducing the redundant stimuli among the generated ones. In this paper, we propose an on-the-fly approach for reducing the stimuli redundancy based on machine learning techniques, which can learn from new knowledge in every cycle of simulation-based verification. Our approach can be easily embedded in traditional framework of simulation-based functional verification, and the experiments on an industrial microprocessor have validated that the approach is effective and efficient. |
| Starting Page | 448 |
| Ending Page | 454 |
| File Size | 217222 |
| Page Count | 7 |
| File Format | |
| ISBN | 9781424488414 |
| ISSN | 10817735 |
| DOI | 10.1109/ATS.2010.82 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-12-01 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Support vector machines Kernel Redundancy Computational modeling Microprocessors Analytical models Computational efficiency Godson-2 Functional Verification Stimuli Reduction Online Learning |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering |
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