NDLI: A framework to evaluate test tradeoffs in embedded core based systems-case study on TI's TMS320C27xx

Content Provider	IEEE Xplore Digital Library
Author	Abraham, J. Prasad, N. Chakravarthy, S. Bagwe, A. Parekhji, R.A.
Copyright Year	2000
Description	Author affiliation: Texas Instrum. (India) Ltd., Bangalore, India (Abraham, J.)
Abstract	Intellectual property cores are being widely used to enable rapid integration of entire systems onto chips. While allowing for rapid system prototyping and design, this methodology complicates the problem of testing them. Various design for test techniques and guidelines are evolving across design groups for embedded core based systems. This paper discusses a framework: for evaluating these techniques and the tradeoffs therein, to drive a cost effective test methodology. Its main contributions include: (i) it inspects various techniques to improve the test coverage and test quality in embedded core based systems. (ii) It explains important test cost measures, and proposes a framework for making design time decisions to minimise the cost. (iii) It presents the results of various experiments carried out on representative DSP core based systems, built around Texas Instruments' new DSP core, TMS320C27xx. These results have highlighted various design, and test tradeoffs, and are being profitably used to drive a cost effective test methodology on newer cores and devices.
Starting Page	417
Ending Page	425
File Size	811101
Page Count	9
File Format	PDF
ISBN	0780365461
ISSN	10893539
DOI	10.1109/TEST.2000.894233
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-10-05
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System testing Costs Digital signal processing Intellectual property Prototypes Design methodology Guidelines Drives Time measurement Instruments
Content Type	Text
Resource Type	Article
Subject	Applied Mathematics Electrical and Electronic Engineering

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