NDLI: A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Haikun Jia Baoyong Chi Lixue Kuang Wei Zhu Zhiping Wang Feng Ma Zhihua Wang
Copyright Year	2015
Description	Author affiliation: Instn. of Microelectron., Tsinghua Univ., Beijing, China (Haikun Jia; Baoyong Chi; Lixue Kuang; Wei Zhu; Zhiping Wang; Feng Ma; Zhihua Wang)
Abstract	This paper presented a frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS process. The FMCW signal is generated by a fractional-N PLL. The frequency doubling scheme can lower down the frequency of the PLL, reduce the required phase shifting range of phase shifter and the design complexity of the LO distributed network. The FMCW chirp bandwidth is 1.93 GHz from 76.92 to 78.85 GHz, while the root-mean-square frequency error is 674 kHz. The transmitting power is 12.9~13.2 dBm. The receive conversion gain is programmable from 47.8 dB to 100.7 dB. The two-path receiver noise figure is 10 dB and 6.6 dB at 400 kHz and 3.3 MHz IF frequencies, respectively. The transceiver consumes 343 mW power.
Starting Page	1
Ending Page	4
File Size	475484
Page Count	4
File Format	PDF
ISBN	9781467371919
DOI	10.1109/ASSCC.2015.7387438
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-11-09
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Gain Transceivers Phase shifters Phase locked loops Baseband Frequency measurement Bandwidth CMOS FMCW frequency doubling phased array
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS

A 76–81 GHz active phase shifter for phased array automotive radar in 65nm CMOS

A 77 GHz 90 nm CMOS transceiver for FMCW radar applications

A four-path 60GHz phased-array receiver with injection-locked LO, hybrid beamforming and analog baseband section in 90nm CMOS

Two on-chip bandwidth calibration methods for phase-locked loops used in wireless transceiver applications

A fully integrated single-chip 35GHz FMCW radar transceiver with high bandwidth in 65nm CMOS process

A Variable-Phase Ring Oscillator and PLL Architecture for Integrated Phased Array Transceivers

A single-chip K-Band CMOS FMCW radar transceiver

Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applications

A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS

Similar Documents

A 60-GHz 16QAM 11Gbps direct-conversion transceiver in 65nm CMOS

A 76–81 GHz active phase shifter for phased array automotive radar in 65nm CMOS

A 77 GHz 90 nm CMOS transceiver for FMCW radar applications

A four-path 60GHz phased-array receiver with injection-locked LO, hybrid beamforming and analog baseband section in 90nm CMOS

Two on-chip bandwidth calibration methods for phase-locked loops used in wireless transceiver applications

A fully integrated single-chip 35GHz FMCW radar transceiver with high bandwidth in 65nm CMOS process

A Variable-Phase Ring Oscillator and PLL Architecture for Integrated Phased Array Transceivers

A single-chip K-Band CMOS FMCW radar transceiver

Design of a wideband low power FMCW synthesizer in 65 nm CMOS for radar applications

A frequency doubling two-path phased-array FMCW radar transceiver in 65nm CMOS