NDLI: An 8-channel chopper-stabilized analog front-end amplifier for EEG acquisition in 65-nm CMOS

Content Provider	IEEE Xplore Digital Library
Author	Chung-Yu Wu Chia-Shiung Ho
Copyright Year	2015
Description	Author affiliation: Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Chung-Yu Wu; Chia-Shiung Ho)
Abstract	An 8-channel chopper-stabilized analog front-end amplifier (AFEA) is designed in 65-nm CMOS for continuous EEG signal acquisition. The AFEA is composed of eight capacitively coupled chopper instrumentation amplifiers (CCCIAs) with chopper-stabilized circuits and band-pass filters, a multiplexed transconductor, and a transimpedance amplifier. The CCCIA employs an inverter-based folded-cascode amplifier (IBFC) to achieve a better noise-to-power tradeoff and a high gain under 1 V power supply, a DC servo loop to suppress electrode offset and provide a low high-pass corner, a low power ripple reduction loop to suppress chopping ripple, and a positive feedback loop to boost its input impedance. The fabricated AFEA has 59.1/69.8/78 dB programmable gain and 0.81 μVrms input-referred noise in a bandwidth of 0.5-100 Hz. The measured power consumption of a single CCCIA is 0.87 μW. The proposed CCCIA has a lower NEF of 2.97 than other CCCIA for EEG acquisition.
Starting Page	1
Ending Page	4
File Size	839267
Page Count	4
File Format	PDF
ISBN	9781467371919
DOI	10.1109/ASSCC.2015.7387480
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-11-09
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electroencephalography Gain Bandwidth Impedance Capacitors Choppers (circuits) Band-pass filters electroencephalogram (EEG) analog front-end low noise low power chopping neural signal acquisition
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in