NDLI: SVM Method for Diagnosing Analog Circuits Fault Based on Testability Analysis

Content Provider	IEEE Xplore Digital Library
Author	Yongkui Sun Guangju Chen Hui Li
Copyright Year	2007
Description	Author affiliation: Univ. of Electron. Sci. & Technol. of China, Chengdu (Yongkui Sun; Guangju Chen)
Abstract	In this paper a new method for diagnosing analog circuits fault is presented. The proposed method use the testability analysis of the circuit under test (CUT) to determine an optimal set of testable components (OSTC), and support vector machine (SVM) was introduced to identify the analog circuits fault. Testability analysis theoretically determines all of the diagnosable components. SVM has good characteristics of simple structure and strong generalization ability. Experimental results show that the proposed method for diagnosing analog circuits fault using testability analysis and SVM is superior to the others and to increase the fault diagnosis accuracy.
Starting Page	3452
Ending Page	3456
File Size	187266
Page Count	5
File Format	PDF
ISBN	9781424408276
DOI	10.1109/ICMA.2007.4304118
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-08-05
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Support vector machines Analog circuits Circuit faults Fault diagnosis Support vector machine classification Artificial intelligence Fault location Electrical fault detection Automation SVM Testability analysis
Content Type	Text
Resource Type	Article

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