NDLI: A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS

Content Provider	IEEE Xplore Digital Library
Author	Ioannou, D.P. Zhao, K. Bansal, A. Linder, B. Bolam, R. Cartier, E. Kim, J. Rao, R. La Rosa, G. Massey, G. Hauser, M. Das, K. Stathis, J.H. Aitken, J. Badami, D. Mittl, S.
Copyright Year	2011
Description	Author affiliation: IBM Microelectronics, Semiconductor R&D Center, Hopewell Junction, NY USA (La Rosa, G.) \|\| IBM T.J. Watson Research Center, Yorktown Heights, NY, USA (Zhao, K.; Bansal, A.; Linder, B.; Cartier, E.; Kim, J.; Rao, R.; Das, K.; Stathis, J.H.) \|\| IBM Microelectronics, Semiconductor R&D Center, Essex Junction, VT, USA (Ioannou, D.P.; Bolam, R.; Massey, G.; Hauser, M.; Aitken, J.; Badami, D.; Mittl, S.)
Abstract	A robust reliability characterization / modeling approach for accurately predicting Bias Temperature Instability (BTI) induced circuit performance degradation in High-k Metal Gate (HKMG) CMOS is presented. A series of device level stress experiments employing both AC and DC stress/relax BTI measurements are undertaken to characterize FET's threshold voltage instability response to a dynamic (inverter type) operation. Results from the AC stress experiments demonstrate that V instability is frequency independent, an observation that suggests that V degradation under AC stress can be equivalently measured through the simpler DC stress/relax sequence. An AC BTI model is developed that accurately captures the critical BTI relaxation effect through the DC stress/relax predictions on duty cycle dependence. A Ring Oscillator (RO) circuit is used as a model verification vehicle. Excellent agreement is demonstrated between the frequency degradation measurements obtained with a newly developed Ultra-Fast On-The-Fly (OTF) measurement technique optimized for BTI and the AC BTI model based RO simulations.
File Size	238349
File Format	PDF
ISBN	9781424491131
ISSN	19381891
e-ISBN	9781424491124
e-ISBN	9781424491117
DOI	10.1109/IRPS.2011.5784559
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-04-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Stress Degradation Stress measurement Integrated circuit modeling Time frequency analysis Logic gates Ring Oscillator High-k Metal Gate PBTI NBTI
Content Type	Text
Resource Type	Article

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