NDLI: LEAP: Layout Design through Error-Aware Transistor Positioning for soft-error resilient sequential cell design

Content Provider	IEEE Xplore Digital Library
Author	Hsiao-Heng Kelin Lee Lilja, K. Bounasser, M. Relangi, P. Linscott, I.R. Inan, U.S. Mitra, S.
Copyright Year	2010
Description	Author affiliation: Robust Chip Inc., USA (Lilja, K.; Bounasser, M.) \|\| Department of Electrical Engineering Stanford University, USA (Hsiao-Heng Kelin Lee; Relangi, P.; Linscott, I.R.; Inan, U.S.; Mitra, S.)
Abstract	This paper presents a new layout design principle called LEAP which is an acronym for Layout Design through Error-Aware Transistor Positioning. This principle extends beyond traditional layout techniques, such as node separation, and significantly improves the soft error resilience of digital circuits with negligible performance cost. In this study, we applied the LEAP technique to the Dual Interlocked Storage Cell (DICE) and designed a new sequential element called LEAP-DICE. This element retains the circuit topology and transistor sizing of DICE but has a new layout based on the LEAP principle. Radiation experiments using an 180nm CMOS test chip demonstrate that our LEAP-DICE flip-flop encounters 5X fewer errors on average compared to our reference DICE flip-flop, and 2,000X fewer errors on average compared to a conventional D-flip-flop. Our LEAP-DICE flip-flop imposes negligible power and delay costs and 40% flip-flop-level area costs compared to our reference DICE flip-flop.
Starting Page	203
Ending Page	212
File Size	2230760
Page Count	10
File Format	PDF
ISBN	9781424454303
ISSN	19381891
e-ISBN	9781424454297
DOI	10.1109/IRPS.2010.5488829
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip-flops Robustness Costs Computer errors Circuit testing Single event upset Protons Resilience Delay Latches proton irradiation LEAP soft error single event upset (SEU) single event multiple upset (SEMU) multiple bit upset (MBU) latch flip-flop dual interlocked storage cell (DICE) layout
Content Type	Text
Resource Type	Article

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