NDLI: Radiation induced kink effects on SOI PMOS transistors

Please wait, while we are loading the content...

1990 IEEE SOS/SOI Technology Conference. Proceedings

A new optical method for identifying crystal defects in silicon-on-insulator materials

Dual-MOSFET structure for suppression of kink in SOI MOSFETs at room and liquid helium temperatures

An approach to analytical modeling of snapback in SOI devices

Modelling of breakdown voltage in sub-micron SOI transistors

A simple model to predict the holding voltage for SOI MOSFETs operating in the latch state

Analysis and control of BJT latch in fully depleted floating-body submicron SOI MOSFETs

Consideration of the structure design for thin SOI/MOSFET under and beyond the half micron regime

Negative conductance model for short-channel SOI MOSFET

Single event charge enhancement in SOI devices

Analysis of radiation-induced leakage in MOS-SOS edge parasitic transistors using a 3-D device simulator

The multistable memory effect in accumulation mode SOI MOSFETs at low temperatures

Parasitic BJT design consideration in SOI MOSFETs

Influence of LDD on aging of SOI NMOS transistors

Hot carrier-induced aging of short channel SIMOX devices

Noise overshoot at drain current kink in SOI MOSFET

Interface characterization in fully depleted SOI MOSFETs by dynamic transconductance

SIMOX material: from research to production

Microstructural evolution of oxides during processing of oxygen implanted SOI material

Characterization of low energy SIMOX (LES) structures

SOI device islands formed by oxygen implantation through patterned masking layers

Advances in recrystallization technology

Stacked SOI layers obtained by zone melting recrystallization

Native silicon oxide agglomeration prior to solid-phase epitaxy using rapid thermal processing

Novel dielectrics for SOI structures

Fast turn characterization of SIMOX wafers

Infrared reflection spectroscopy analysis of SIMOX material obtained by multiple implant

Recombination lifetime measurements in SOI materials using a depletion-mode MOSFET

Improved speed and accuracy for optical reflectance profiling of SIMOX wafers

Dopant redistribution and activation in thin film SOI/SIMOX substrates

Sensitivity of ellipsometric modeling to the 'islands' of silicon precipitates at the bottom of the buried oxide layer in annealed SIMOX

X-ray characterization of silicon on insulator substrates

Charge densities at silicon interfaces prepared by wafer bonding

Salicide technology for fully-depleted SOI CMOS devices

Photolithographic linewidth control considerations on ultrathin fully depleted SOI devices

A trench isolated SOI bipolar process

P-JFET on SIMOX for rad-hard analog devices

Substrate floating effects of p-channel SOI MOSFETs

Low temperature effective channel mobility in fully depleted and partially depleted SOI MOSFETs

Threshold voltage instability at low temperatures in partially depleted thin film SOI MOSFETs

Determination of generation lifetime in silicon-on-insulator (SOI) substrates using a three-terminal capacitance-time response

Surface potential at threshold, transconductance, and carrier generation in thin SOI MOSFETs

Radiation induced kink effects on SOI PMOS transistors

Elimination of kink effect in fully depleted buried channel SOI MOSFET based on silicon direct bonding technology

Limitations to fully-depleted SOI structures

Low frequency noise spectroscopy in thin SIMOX MOS transistors

A general model of the thin-film SOI-MOSFET

Modeling of thin film depletion-mode SOI MOSFETs

Incorporation of an engineering mobility model in an accurate analytical I-V description for SOI devices

Impact ionization at low drain voltages in SOI FETs

Polycrystalline silicon thin-film CMOS technology: the poor man's SOI

Bipolar transistors in silicon-on-sapphire (SOS): effects of nanosecond thermal processing

Lateral isolation in SOI CMOS technology

Epi-less bond etch SOI using MeV ion implantation

Completely dielectrically isolated silicon for high voltage application produced by ZMR of poly Si on SiO/sub 2/

Epitaxial GeSi strained layer on SIMOX for confinement of threading dislocations

Double solid phase epitaxy of germanium implanted silicon on sapphire

Diamond based silicon-on-insulator structures

Novel diffusion effects in a dielectrically isolated BIMOS process using SOI substrates

Rounded edge mesa for submicron SOI CMOS process

Significant improvement in characteristics of SOS/MOSFETs by CW-Ar laser-recrystallization

Silicon-on-insulator 'gate-all-around' MOS device

Generation lifetime in fully depleted, enhancement mode SOI MOSFETs

The influence of emitter efficiency on single transistor latch in silicon-on-insulator MOSFETs

Charge trapping in single and multiple implant SIMOX buried oxides

Highly selective etch stop by stress compensation for thin-film BESOI

Effects of adhesive properties on SOI devices obtained by device transfer method

SOI technologies applications: trends in VLSI

SIMOX layers and interfaces studies with a new fast multichannel spectroscopic ellipsometer

Residual defects in SIMOX: threading dislocations and pipes

Persistent photoconductivity in SIMOX films

Low-field charge injection in SIMOX buried oxides

The effect of high field stress on the capacitance/voltage characteristics of buried insulators formed by oxygen implantation

Influence of gamma irradiation on ESR active defects in SIMOX structures

Direct experimental evidence for a dominant hole trapping center in SIMOX oxides

High voltage DMOS power FETs on thin SOI substrates

A composite high-voltage device using low-voltage SOI MOSFETs

Vertical 1.3 mu m optical modulator in silicon-on-insulator

Bias dependence of buried oxide hardness during total dose irradiation

Advanced CMOS/SOS LSI rad hard 1750 A/B processor

Polysilicon thin film transistors with field-plate-induced drain junction for both high-voltage and low-voltage applications

1990 IEEE SOS/SOI Technology Conference. (Cat. No.90CH2891-0)

IEEE SOS/SOI Technology Conference

Radiation induced kink effects on SOI PMOS transistors

Content Provider	IEEE Xplore Digital Library
Author	Dars, P. Merckel, G. Haond, M. Coumar, O. Gaillard, R. Belhaddad, H.
Copyright Year	1990
Description	Author affiliation: CNET-CNS, Meylan, France (Dars, P.; Merckel, G.; Haond, M.)
Abstract	The authors discuss the influence of back oxide trapped charges on the degradation of the output characteristics of irradiated SOI PMOS transistors. It is found that a positive back gate bias during gamma irradiation promotes an accumulation of trapped holes at the Si-SiO/sub 2/ interface in the buried oxide. The induced parasitic kink effect, which is usually present in SOI NMOS, has been observed and characterized in a PMOS transistor. These results, explained by the increased electric field near the drain, are confirmed by a 2-D analysis. This phenomenon, related to P-channels, should be taken into account for analogical device and circuit optimization.
Starting Page	97
Ending Page	98
File Size	134316
Page Count	2
File Format	PDF
ISBN	0879425733
DOI	10.1109/SOSSOI.1990.145727
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-10-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFETs Silicon Semiconductor films Electric variables measurement Space charge Electric variables Gamma rays Degradation Substrates Plasma applications
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in