NDLI: The effect of ion implantation on the gate oxide integrity of SOI wafers

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1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199)

SOI and device scaling

Design considerations of SOI digital CMOS VLSI

SOI as a mainstream IC technology

Reduction of crystalline defects to 50/cm/sup 2/ in epitaxial layers over porous silicon for ELTRAN/sup R/ process

Multiple layers of silicon-on-insulator (MLSOI) islands fabrication process and fully-depleted SOI pMOSFETs

Suppression of Si etching during hydrogen annealing of silicon-on-insulator

Electrical characteristics of the interface between the top Si and buried oxide in ITOX-SIMOX wafers

Carrier lifetime extraction in fully-depleted SOI devices

A physically-based low-frequency noise model for NFD SOI MOSFET's

Effect of body-to-source bias on the analog characteristics of 0.35 /spl mu/m partially depleted SOI CMOS for low-voltage low-power mixed-mode applications

Experimental investigation of MOSFETs and coplanar waveguides on p-type high resistivity SIMOX substrate for radio-frequency applications

3-D simulation analysis of high performance SOI lateral BJT for RF applications

High-Q SOI gate varactor for use in RF ICs

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Detailed characterization of Unibond/sup R/ structure buried oxide [SOI]

Hydrogen annealing treatment used to obtain high quality SOI surfaces

Buried oxide densification for low power, low voltage CMOS applications [SIMOX]

High quality low-dose low-energy SIMOX implanted in high current oxygen implanter

FT-IR reflectance spectroscopy control of SIMOX structures

Noncontact acoustic wave metrology of SOI substrates

Effect of post-implantation amorphization on microstructural development of the buried oxide layer in low-dose SIMOX material

Structural characterization of local SIMOX-substrates

SiGe-on-insulator substrate created by low-energy oxygen implantation into a thick pseudomorphic SiGe grown on Si[100]

Switching speed enhancement of the LDMOSFETs using partial-SOI technology

Lateral emitter-controlled thyristor (LECT) on SOI

Buried gate SOI LIGBT without latch-up susceptibility

Very high voltage integration in SOI based on a new floating channel technology

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A new SOI structure for mixed mode ICs and its body-related characteristics

A new SOI MOSFET for low power applications

Fully-depleted 0.25 /spl mu/m SOI devices for low power RF mixed analog-digital circuits

Design and optimization of double-gate SOI MOSFETs for low voltage low power circuits

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Edge effects characterization in gate-all-around SOI MOSFETs

Nanoscale metal-semiconductor-metal photodetectors fabricated on SOI-substrates

Effects of body reverse pulse bias on geometric component of charge pumping current in FD SOI MOSFETs

Analysis of hot-carrier-induced degradation in deep submicron Unibond and SIMOX N-MOSFETs using charge pumping and noise techniques

Hot electron induced punchthrough (HEIP) in p-channel SOI MOSFET's

Negative bias instability in silicon-on-sapphire n-channel MOSFETs

Gate oxide integrity testing on SOI wafers without test structure fabrication

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Radiation properties of UNIBOND/sup TM/ with 200 nm buried oxide [SOI wafers]

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Investigation of a novel self-aligned dual gate MOSFET structure

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Defect characterization in Unibond/sup R/ wafers by photoluminescence spectroscopy and transmission electron microscopy

Defect reduction of bonded SOI wafers by post anneal process in H/sub 2/ ambient

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Control of off-state current in scaled PD/SOI CMOS digital circuits

High responsivity photo-sensor using gate-body tied SOI MOSFET

Defect free deep trench isolation for high voltage bipolar application on SOI wafer

A low thermal budget salicide with germanium large angle tilt implant and preamorphization to improve the performance of thin film SOI MOSFETs

Efficacy of Ar in reducing the kink effect on floating-body NFD/SOI CMOS

Evanescent-mode analysis of short-channel effects in fully depleted SOI and related MOSFETs

A soft error immune 0.35 /spl mu/m PD-SOI SRAM technology compatible with bulk CMOS

Bonding of thin films on 200 mm silicon wafers using chemical mechanical polishing

The Genesis Process/sup TM/: a new SOI wafer fabrication method

SOI on buried cavity patterns using ion-cut layer transfer

Electrical detection of defects in SIMOX buried oxides: pipes and precipitates

Improved uniformity in bonded SOI wafers with active layers from 1 to 30 /spl mu/m at high throughputs

Increased channel edge impact ionization in SOI MOSFET's and effects on device operation

Micro-machined dielectrically isolated (MMDI) wafer technology [SOI]

1997 IEEE International SOI Conference Proceedings

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Proceedings. IEEE International SOI Conference

Proceedings of 1993 IEEE International SOI Conference

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1991 IEEE International SOI Conference Proceedings

The effect of ion implantation on the gate oxide integrity of SOI wafers

Content Provider	IEEE Xplore Digital Library
Author	Terauchi, M. Samata, S. Kubota, H. Yoshimi, M.
Copyright Year	1996
Description	Author affiliation: Adv. Semicond. Device Res. Labs., Toshiba Corp., Kawasaki, Japan (Terauchi, M.)
Abstract	The effect of ion implantation on the gate oxide integrity (GOI) of SOI wafers has been investigated. It has been found that the GOI of SOI wafers is significantly affected by ion implantation to the SOI layer before gate oxidation. SOI wafers are found to be more sensitive to metal contamination than bulk wafers because the buried oxide (BOX) layer functions as a diffusion barrier for metal contamination. The effect of the SOI-BOX interface on the gettering of metal contamination is also discussed.
Sponsorship	IEEE Electron Devices Soc
Starting Page	125
Ending Page	126
File Size	247719
Page Count	2
File Format	PDF
ISBN	0780345002
ISSN	1078621X
DOI	10.1109/SOI.1998.723143
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-10-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Ion implantation Gettering Capacitors Pollution measurement Contamination Doping CMOS technology Silicon on insulator technology Oxidation Fabrics
Content Type	Text
Resource Type	Article

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