NDLI: Structural characterization of local SIMOX-substrates

Content Provider	IEEE Xplore Digital Library
Author	Van Bentum, R. Vogt, H.
Copyright Year	1996
Description	Author affiliation: Fraunhofer Inst. of Microelectron. Circuits & Syst., Duisburg, Germany (Van Bentum, R.)
Abstract	Thin film SOI substrates are very attractive for low power applications due to the lower subthreshold swing, higher switching speed, lower power consumption and higher degree of integration as compared to bulk circuits. Also, due to the total dielectric isolation, SOI transistors show no latch-up effect and lower leakage currents, and the latter also makes them very attractive for smart power applications. Smart power devices are, for example, DMOS transistors or IGBTs that are controlled by standard MOS circuits. For high currents, these power devices are often built as vertical devices. At the Fraunhofer Institute, local SIMOX wafers are used for smart power applications to isolate the low-voltage part from the power part of the circuit dielectrically instead of the normal junction isolation (Vogt et al., 1993). In this work, a structural comparison is made between local SIMOX substrates produced by four different methods. The samples were prepared (1) by local oxygen implantation, (2) by a LOCOS process followed by wet chemical removal of the oxide, (3) by dry etching of the silicon film and the BOX, and (4) by wet chemical etching of the silicon film and the BOX. The samples were examined by SEM and TEM analysis, AFM measurements and defect etching.
Sponsorship	IEEE Electron Devices Soc
Starting Page	49
Ending Page	50
File Size	421227
Page Count	2
File Format	PDF
ISBN	0780345002
ISSN	1078621X
DOI	10.1109/SOI.1998.723105
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-10-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Dielectric substrates Dielectric thin films Chemical processes Dry etching Silicon Semiconductor films Thin film circuits Switching circuits Energy consumption Leakage current
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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