NDLI: Cost effective, mass productive Wafer-Level Chip Size Package (WLCSP) technology applied to Ku-band frequency converters

Content Provider	IEEE Xplore Digital Library
Author	Fujita, S. Imagawa, M. Satoh, T. Tokumitsu, T. Hasegawa, Y.
Copyright Year	2010
Description	Author affiliation: Sumitomo Electric Device Innovations, Inc., 1000 Kamisukiawara, Showa-cho, Nakakoma-gun, Yamanashi, 409-3883 Japan (Fujita, S.; Imagawa, M.; Satoh, T.; Hasegawa, Y.) \|\| Transmission Device R&D Laboratories, Sumitomo Electric Industries, Ltd., Taya-cho, Sakae-ku, Yokohama, 244-8588 Japan (Tokumitsu, T.)
Abstract	Cost effective, mass productive Ku-band up- and down-converter MMIC's for wireless communication are presented. These MMIC's are designed by using a three-dimensional MMIC technology that optimized for flip-chip solder reflow-compatible implementation; hence, that removes necessity of packaging. The MMIC structure incorporates inverse TFMS lines so that a ground metal can be applied to cover the whole chip surface except for interconnect pads. Among multi-polyimide and SiN layers, four wiring metal layers are composed. The up-converter MMIC's were composed of a pair of balanced mixers, which are doubly balanced with additional quadrature couplers and a LO amplifier. The down-converter is composed of an image-rejection mixer, a LO amplifier and low-noise amplifier. The components are effectively integrated in a 2.4mm × 2.4mm die. An up-converter exhibited a Gc of −12dB, an IIP3 of nearly 20dBm, and a LO-to-RF leakage of less than −35dBm for a 0dBm of LO input. A 13–15GHz down-converter exhibited a Gc of +12dB, an IIP3 of better than 0dBm, and an image-rejection ratio of greater than 20dB (>30dB for flip-chip assembly) for a 2dBm of LO input. The measurements were performed in both the face-up (with RF-Probe) and flip-chip fashions. An LTCC package implementation was also examined. As a result, the RF performances did not depend on these measurement states and showed high repeatability. We also present the mass productivity of WLCSP MMIC by showing statistical data.
Starting Page	1212
Ending Page	1215
File Size	1236363
Page Count	4
File Format	PDF
ISBN	9781424475902
e-ISBN	9784902339215
e-ISBN	9781902339222
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-12-07
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	IEICE Institute of Electronics Informati
Subject Keyword	MMICs ISO standards Radio frequency Productivity wireless communications WLCSP three-dimensional up-converter down-converter
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

E-band radio link communication chipset in cost effective Wafer Level Chip Size Package (WLCSP) technology

Cost effective Wafer-Level Chip Size Package technology and application for high speed wireless communications

A LTCC-BGA multi-chip packaging technology for MMICs up to Ku-band

A LTCC-BGA multi-chip packaging technology for MMICs up to Ku-band

Up-converter and down-converter design for S-Ku-band

A fully integrated Ku-band down-converter front-end for DBS receivers

A full E-band low noise amplifier realized by using novel wafer-level chip size package technology suitable for reliable flip-chip reflow-soldering

A compact C-band down converter SiP with integrated LO in a metal ceramic package

Monolithic Up / Down Converters for Millimeter-wave Wireless Networks

Cost effective, mass productive Wafer-Level Chip Size Package (WLCSP) technology applied to Ku-band frequency converters

Similar Documents

E-band radio link communication chipset in cost effective Wafer Level Chip Size Package (WLCSP) technology

Cost effective Wafer-Level Chip Size Package technology and application for high speed wireless communications

A LTCC-BGA multi-chip packaging technology for MMICs up to Ku-band

A LTCC-BGA multi-chip packaging technology for MMICs up to Ku-band

Up-converter and down-converter design for S-Ku-band

A fully integrated Ku-band down-converter front-end for DBS receivers

A full E-band low noise amplifier realized by using novel wafer-level chip size package technology suitable for reliable flip-chip reflow-soldering

A compact C-band down converter SiP with integrated LO in a metal ceramic package

Monolithic Up / Down Converters for Millimeter-wave Wireless Networks

Cost effective, mass productive Wafer-Level Chip Size Package (WLCSP) technology applied to Ku-band frequency converters