NDLI: Advanced hardware architecture for on-line data acquisition in clinical 3-D PET: smart DRAM PCI Card for 14 M event/sec histogramming across terabytes of DRAM

Content Provider	IEEE Xplore Digital Library
Author	Jones, W.F. Running, M. Draughn, L. Reed, J.
Copyright Year	2004
Description	Author affiliation: CPS Innovations of Knoxville, TN, USA (Jones, W.F.)
Abstract	Clinical PET places a demanding burden on the data acquisition architecture - especially when using larger, higher sensitivity detector arrays coupled with demands for high patient throughput. Pure list-mode data acquisition can have limited acceptance due to either too-slow event-packet collection speeds and/or too-slow post-acquisition processing. The typical resolution for this problem has been to perform both LOR-to-bin mapping (rebinning) and histogramming (/spl plusmn/unity to memory) in an on-line manner - i.e. projection space "sinograms" are generated during the acquisition while the patient is still in the tomograph. This article describes a new design for very-high-speed online histogramming hardware - the Smart DRAM PCI card. This hardware is significant in the quest to address the needs of fast on-line histogramming into large DRAM arrays. This card has an integral dual-Fibre-Channel interface for receiving (and retransmitting) PET bin-address packets. Also, the card has onboard quad-interleaved ECC DDR SDRAM (4 DIMMs & up to 4 G bytes total per card) with a demonstrated capacity for sustained histogramming rates in excess of 14 M events/sec The retransmit-packets-on-Fibre-Channel feature supports a daisy chain of multiple such Smart DRAM cards. This means the architecture can easily make terabytes of memory available for on-line generation of projection data. Support is planned for time-of-flight and weighted histogramming as well as online gating.
Starting Page	3663
Ending Page	3667
File Size	1294307
Page Count	5
File Format	PDF
ISBN	0780387007
ISSN	10823654
e-ISBN	0780387015
DOI	10.1109/NSSMIC.2004.1466676
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-10-16
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Hardware Data acquisition Positron emission tomography Telephony Technological innovation Detectors Sensor arrays Throughput DRAM chips
Content Type	Text
Resource Type	Article

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