NDLI: A study of new flip chip packaging process for diversified bump and land combination

Content Provider	IEEE Xplore Digital Library
Author	Noro, H. Ito, S. Kuwamura, M. Mizutani, M.
Copyright Year	1998
Description	Author affiliation: Nitto Denko Corp., Mie, Japan (Noro, H.)
Abstract	Flip chip packaging using plastic substrates is gaining popularity in the IC packaging market. However, the process has not been standardized as a real mass production system. We have newly developed a flip chip packaging technology using a nonconductive underfill resin sheet. The process flow of the new flip chip packaging is as follows. First, the underfill sheet is laminated to the substrate. Next, the bumped die is aligned and attached to the substrate, which is covered with the underfill sheet under appropriate heat and pressure conditions. The bumps under the die penetrate by displacing resin and eventually reach the metal land of the substrate. Finally, curing of the underfill sheet and metal connections is done. We have studied the possibility of application of this packaging technology to diversified bump and land combinations with changing underfill components and process parameters. The electrical stability under several stress test conditions such as JEDEC Level-3 and TST has been evaluated in this study. After this evaluation, we found that the packages which were built with the appropriate resin components and process parameters show good performance for all of these reliability tests, almost regardless of bump and land materials.
Starting Page	100
Ending Page	105
File Size	575353
Page Count	6
File Format	PDF
ISBN	0780350901
DOI	10.1109/IEMTIM.1998.704533
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-04-15
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Organizing Committee
Subject Keyword	Flip chip Resins Plastic integrated circuit packaging Integrated circuit packaging Mass production Curing Stability Stress Testing Materials reliability
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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