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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ghosh, B.K. Saad, I. Yamamoto, A. |
| Copyright Year | 2011 |
| Description | Author affiliation: Dept. of Electrical & Electronics Eng., Fukui University, Bunkyo 3-9-1, Fukui 910-8507, Japan (Yamamoto, A.) || Dept. of Electrical and Electronics Eng., Univeristi Malaysia Sabah, Jalan UMS, 88400 Kota-kinabalu, Sabah, Malaysia (Ghosh, B.K.; Saad, I.) |
| Abstract | The stress and defect generation; hence luminescence efficiency of semiconductor materials is correlated. Even severe cracks are formed on the epilayer surface due to stress those impair the photoluminescence property of devices. So the stress effect of GaN epilayer grown on Si(111) is evaluated by different growth approaches and different interlayer's. Epilayer on thinner converted SiC templates is found to increases PL Ex. peak energy with broadening its line width whereas epilayer grown on porously converted GaN layer is found comparatively low PL Ex. peak energy with narrowing its line width. From Raman scattering analysis, it is also observed that the PL Ex. peak is not signifies actual stress level rather its reveals epilayer quality. PL Ex. Peak energy is found to increase with increasing thickness of epilayer grown on converted interlayer on Si substrate. |
| Starting Page | 392 |
| Ending Page | 395 |
| File Size | 236161 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781612848440 |
| e-ISBN | 9781612848464 |
| DOI | 10.1109/RSM.2011.6088368 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2011-09-28 |
| Publisher Place | Malaysia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Silicon carbide Lattices Silicon Gallium nitride Stress Substrates Strain |
| Content Type | Text |
| Resource Type | Article |
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