NDLI: A Code Refinement Methodology for Performance-Improved Synthesis from C

Content Provider	IEEE Xplore Digital Library
Author	Stitt, G. Vahid, F. Najjar, W.
Copyright Year	2006
Description	Author affiliation: Dept. of Comput. Sci. & Eng., California Univ., Riverside, CA (Stitt, G.; Vahid, F.; Najjar, W.)
Abstract	Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffers due to the use of C constructs and coding practices that are not appropriate for hardware. Most previous approaches to addressing this problem require drastic changes to coding practice. We present an approach that instead requires only minimal changes but yields significant speedups. In this approach, a software developer initially writes C code as they normally would, and then applies simple refinement guidelines to only the performance-critical code regions, which are the regions most likely to be synthesized to hardware. Alternatively, if a designer is aware of performance-critical parts of the application, the guidelines could be followed during development. In this study, we analyze dozens of embedded benchmarks to determine the most common C coding practices that limit hardware performance, and introduce coding guidelines to make the code more amenable to synthesis. Those guidelines typically require minimal coding effort, generally consisting of less than ten lines of code for each guideline. The guidelines typically represent modifications that require designer knowledge, making the guidelines difficult or impossible for synthesis tools to automate. We apply these guidelines to six benchmarks, resulting in average speedups of 3.5times compared to synthesis from the original code with a negligible software size and performance overhead
Starting Page	716
Ending Page	723
File Size	10770140
Page Count	8
File Format	PDF
ISBN	1595933891
ISSN	10923152
DOI	10.1109/ICCAD.2006.320018
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-11-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Guidelines Software performance Field programmable gate arrays Embedded software Application software Hardware design languages Permission Computer science Embedded computing Computer languages compilation Synthesis hardware/software partitioning coding guidelines code refinement embedded systems FPGA
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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