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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Shahriar Rashid, S.M. Rashid, A.B.M.H. |
| Copyright Year | 2010 |
| Description | Author affiliation: Department of Electrical & Electronic Engineering, Bangladesh University of Engineering & Technology, Dhaka-1000, Bangladesh (Shahriar Rashid, S.M.; Rashid, A.B.M.H.) |
| Abstract | In this paper, a square law CMOS double balanced mixer is designed in IBM 90nm technology with improved input isolation technique for high frequency applications. Responses of the circuit is demonstrated when a 1GHz signal is up converted by a 19GHz carrier. Conversion gain (S21) of the mixer is 11.4dB with 4.5GHz Bandwidth (17.3GHz to 21.8GHz) and the input-output matching parameters (S11 and S22) are −18dB and −18.8dB respectively. Noise figure of the circuit is 6.1dB and the power consumption is 9.25mW, the power supply being 1.2V. It achieved an input referred 1dB compression point of −10.8dBm and the IIP3 is about 0dBm. The mixer has the flexibility of being used as a single balanced one as well. The input isolation is improved and is better than −15dB at the input frequencies of interest, which makes this simple circuit attractive for high frequency applications. The group delay distortion was analyzed with the help of a three tone test signal and was found satisfactory. |
| Starting Page | 1088 |
| Ending Page | 1091 |
| File Size | 2131627 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424481552 |
| e-ISBN | 9781424481576 |
| DOI | 10.1109/ICECS.2010.5724705 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-12-12 |
| Publisher Place | Greece |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Single balanced Mixer Square law CMOS Up conversion Input isolation Double balanced |
| Content Type | Text |
| Resource Type | Article |
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