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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sparso, J. |
| Copyright Year | 2009 |
| Description | Author affiliation: Department of Informatics and Mathematical Modelling, Technical University of Denmark, Richard Petersens Plads, Building 322, DK-2800 Kgs. Lyngby, Denmark (Sparso, J.) |
| Abstract | This paper is a survey paper presenting what the author sees as two major and promising trends in the current research in CAD-tools and design-methods for asynchronous circuits. One branch of research builds on top of existing asynchronous CAD-tools that perform syntax directed translation, e.g. the Haste/TiDE tool from Handshake Solutions or the Balsa tool from the University of Manchester. The aims are to add high-level synthesis capabilities to these tools and to extend the tools such that a wider range of (higher speed) micro-architectures can be generated. Another branch of research takes a conventional synchronous circuit as the starting point, and then adds some form of handshake-based flow-control. One approach keeps the global clock and implements discrete-time asynchronous operation. Another approach substitutes the clocked registers by asynchronous handshake-registers, thus creating truly continuous-time asynchronous circuits that operate without a clock. The perspective here is that the substitution/conversion is done as the final step in an otherwise conventional synchronous design flow. |
| Starting Page | 347 |
| Ending Page | 350 |
| File Size | 116694 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424450909 |
| DOI | 10.1109/ICECS.2009.5411011 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-12-13 |
| Publisher Place | Tunisia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | High level synthesis Asynchronous circuits Clocks Circuit synthesis Large-scale systems Buildings Tides Registers Voltage Integrated circuit interconnections |
| Content Type | Text |
| Resource Type | Article |
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