NDLI: Backend processing for wafer level chip scale packaging

Content Provider	IEEE Xplore Digital Library
Author	Hunt, J.R.
Copyright Year	2003
Description	Author affiliation: Adv. Semicond. Eng., Inc., Tempe, AZ, USA (Hunt, J.R.)
Abstract	As the electronics industry has continued its pursuit of miniaturization at the IC, package, card and system levels; high-density packaging technologies have been developing at an ever increasing rate to provide these smaller, lighter, faster, and cheaper packages and sub-systems. To achieve this greater functionality per unit volume for portable and miniature electronic assemblies, Wafer Level Chip Scale Packaging (WLCSP) has become an important packaging alternative for the electronics industry. Within the next year, volumes of WLCSP product are expected to increase more than twofold. As WLCSPs are limited to relatively small die, the number of die per 200 mm wafer can range from 2 K die per wafer to over 20 K die per wafer. This creates the requirement for the backend processing of extremely high volumes of WLCSP die. The processes and equipment have had to evolve rapidly in order to accommodate the processing and inspection of these large volumes of WLCSP die product.
Starting Page	187
Ending Page	193
File Size	660599
Page Count	7
File Format	PDF
ISBN	0780379330
ISSN	10898190
DOI	10.1109/IEMT.2003.1225897
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-07-16
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Chip scale packaging Wafer scale integration Electronics packaging Integrated circuit packaging Logic devices Electronics industry Semiconductor device packaging Assembly Manufacturing processes Printing
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electrical and Electronic Engineering

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