NDLI: Diamond-a new high thermal conductivity substrate for multichip modules and hybrid circuits

Content Provider	IEEE Xplore Digital Library
Author	Norwood, D. Worobey, W. Peterson, D. Miller, D.
Copyright Year	1993
Description	Author affiliation: Sandia Nat. Labs., Albuquerque, NM, USA (Norwood, D.; Worobey, W.; Peterson, D.; Miller, D.)
Abstract	Sandia National Laboratories is developing diamond substrate technology to meet the requirements of high thermal conductivity. Thin-film processes were developed and characterized to delineate conductor-resistor networks on free-standing diamond substrates having fine line gold conductors and low and high sheet resistivity resistors. Thin-film hybrid circuit technology was developed on CVD (chemical vapor deposition)-processed, polycrystalline diamond substrates having as-deposited surface finishes as well as those with polished surfaces. Conductors were defined by pattern plating gold and resistors were processed from sputtered tantalum nitride films which were deposited to sheet resistivities of 5 and/or 100 ohms per square. Resistor films on diamond substrates were evaluated for temperature coefficient of resistance (TCR), stability with time and temperature, and trimmability using YAG laser processing. Plated gold conductors were patterned on diamond to feature sizes of 25 microns and successfully tested for adhesion and bondability. Advanced YAG laser trimming techniques were developed to allow resistor trims on both low and high value resistors to within 1% of design value while maintaining required resistor stability.<>
Starting Page	910
Ending Page	919
File Size	1141774
Page Count	10
File Format	PDF
ISBN	0780307941
DOI	10.1109/ECTC.1993.346743
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-06-01
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Thermal conductivity Resistors Substrates Laser stability Chemical technology Gold Conductive films Thin film circuits Surface finishing Temperature
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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