NDLI: Characterization of MoSi2-gate buried channel MOSFET's for a 256K-bit dynamic RAM

Content Provider	IEEE Xplore Digital Library
Author	Tanaka, T. Ishiuchi, H. Takeuchi, Y. Ishikawa, M. Mochizuki, T. Ozawa, O.
Copyright Year	1981
Description	Author affiliation: Toshiba Corporation, Kawasaki-city, Kanagawa (Tanaka, T.)
Abstract	MoSi2-gate buried channel MOSFETs as a transfer gate of a memory cell and an element of peripheral circuits of a 256k-bit dynamic RAM have been investigated. Two-dimensional numerical analysis predicts that MoSi2-gate buried channel MOSFETs have inherently larger subthreshold leakage current than conventional Si-gate MOSFETs, but it can be improved by a deep ion-implantation. Experimental results which support the analytical predictions will be presented. It is found by BT-stress test that MoSi2-gate MOSFETs are much more reliable than Si-gate MOSFETs concerning the oxide breakdown. This is due to the buried channel structure, and hence, is one of very attractive features of MoSi2-gate MOSFETs. To verify the applicability of MoSi2- gate MOSFETs to a 256k-bit dynamic RAM, memory cell arrays with a unit cell area of 5.6 × 13 $µm^{2}were$ fabricated. The measured memory holding time is 6 ∼ 8 msec at 100°C, which assures the 4 msec refresh time of a 256k-bit dynamic RAM.
Starting Page	659
Ending Page	662
File Size	289330
Page Count	4
File Format	PDF
DOI	10.1109/IEDM.1981.190173
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1981-12-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFETs DRAM chips Threshold voltage Random access memory Boron Circuits Capacitance Leakage current Semiconductor devices Laboratories
Content Type	Text
Resource Type	Article

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