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Content Provider | IEEE Xplore Digital Library |
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Author | Elhossini, A. Moussa, M. |
Copyright Year | 2012 |
Description | Author affiliation: Sch. of Eng., Univ. of Guelph, Guelph, ON, Canada (Moussa, M.) || Fac. of Eng., Azhar Univ., Cairo, Egypt (Elhossini, A.) |
Abstract | Hough transform (HT) is a widely used algorithm in machine vision systems. In this paper, a memory efficient architecture for implementing HT on FPGAs is presented. The proposed architecture enables storing the HT space on the FPGA's memory blocks with no need for accessing external memory while processing large size images in real-time with high frame rate. It can be used for both line and circle detection. Results show very good accuracy with images processed at 30 fps frame rate and image size of 800 × 600. This compares favourably with other reported architectures in the literature. |
Sponsorship | IEEE Montreal Sect. |
Starting Page | 1 |
Ending Page | 5 |
File Size | 1181962 |
Page Count | 5 |
File Format | |
ISBN | 9781467314312 |
ISSN | 08407789 |
e-ISBN | 9781467314336 |
e-ISBN | 9781467314329 |
DOI | 10.1109/CCECE.2012.6335003 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2012-04-29 |
Publisher Place | Canada |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Field programmable gate arrays Transforms Hardware Mathematical model Memory management Image edge detection Computer vision Hough Transform FPGA |
Content Type | Text |
Resource Type | Article |
Subject | Electrical and Electronic Engineering Hardware and Architecture |
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