NDLI: A New Array Fabric for Coarse-Grained Reconfigurable Architecture

Content Provider	IEEE Xplore Digital Library
Author	Yoonjin Kim Mahapatra, R.N.
Copyright Year	2008
Description	Author affiliation: Dept. of Comput. Sci., Texas A&M Univ., College Station, TX (Yoonjin Kim; Mahapatra, R.N.)
Abstract	Coarse-grained reconfigurable architectures (CGRA) employ square or rectangular arrays composed of many computational resources for high performance. Though these array fabrics are mostly suitable for embedded systems including multimedia applications, they occupy large area and consume much power. Therefore, reducing area and power of CGRA is necessary for the reconfigurable architectures to be used as a competitive IP core in embedded systems. In this paper, we propose a new array fabric for designing CGRA to reduce area and power consumption without any performance degradation. This cost-effective approach is able to reduce the array size through efficient arrangement of array components and their inter-connections. Experimental results show that for multimedia applications, the proposed array fabric reduces area up to 40.32% and saves power by up to 28.35 % when compared with the existing CGRA architecture.
Starting Page	584
Ending Page	591
File Size	421051
Page Count	8
File Format	PDF
ISBN	9780769532776
DOI	10.1109/DSD.2008.67
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-09-03
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fabrics Reconfigurable architectures Embedded system Energy consumption Computer architecture Design methodology Degradation Hardware Costs Digital systems Reconfiguable Architecture System on Chip Embedded Systems
Content Type	Text
Resource Type	Article

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