NDLI: First AlN/GaN HEMTs power measurement at 18 GHz on Silicon substrate

Content Provider	IEEE Xplore Digital Library
Author	Medjdoub, F. Zegaoui, M. Ducatteau, D. Rolland, N. Rolland, P.A.
Copyright Year	2011
Description	Author affiliation: IEMN, Avenue Poincaré, 59652 Villeneuve d'Ascq, France (Medjdoub, F.; Zegaoui, M.; Ducatteau, D.; Rolland, N.; Rolland, P.A.)
Abstract	AlN/GaN heterostructure is an ideal candidate to push the limits of microwave GaN-based devices owing to the maximum theoretical spontaneous and piezoelectric difference between the epitaxial AlN barrier and the underlying GaN layer. If the tricky growth conditions of this binary can be controlled, AlN/GaN HEMTs promise breakthrough performances, superior to any other III-V nitride-based heterostructure [1]. In particular, this structure should allow the extension of the GaN-based frequency operation due to the possibility to significantly reduce the gate length while maintaining an appropriate gate-to-channel aspect ratio to mitigate short channel effects. However, gate leakage current remains a serious issue with such ultrathin barrier heterostructure and gate dielectrics that often leads to device instability are generally used to overcome this problem. Furthermore, there is an increasing interest in the growth of GaN-on-Si substrates because of its low cost, large size, good thermal conductivity and the potential for integration with Si-based devices. In this work, we developed a novel AlN/GaN HEMT technology on Si substrate. The highest GaN-on-Si drain current density as well as a record transconductance together with excellent RF performance have been achieved. Additionally, AlN/GaN HEMT power measurements at 18 GHz have been performed for the first time. These results show the outstanding potential of this structure to extend GaN-on-Si performances to millimeter wave applications.
Starting Page	219
Ending Page	220
File Size	649401
Page Count	2
File Format	PDF
ISBN	9781612842431
ISSN	15483770
e-ISBN	9781612842448
e-ISBN	9781612842424
DOI	10.1109/DRC.2011.5994506
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-06-20
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Gallium nitride HEMTs
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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