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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hughes, G. |
| Copyright Year | 2005 |
| Description | Author affiliation: IBM Syst. & Technol. Group, IBM, USA (Hughes, G.) |
| Abstract | Summary form only given. Today's semiconductor marketplace demands nanometer designs of unprecedented complexity and performance, with uncompromising time-to-market requirements. This drives a focus on predictable, high-quality design results despite the challenges associated with these next-generation technologies. This scenario is complicated even further by the need to address these challenges across a wide spectrum of products, ranging from high-frequency processor designs to extremely complex ASIC designs. In the nanometer era, the common factor for ensuring market leadership across this broad variety of products is achieving single-pass design success to avoid costly re-spins and the loss of market opportunities: design turnaround time must be minimized without compromising design efficiency and first-time-right requirements. Design automation tools must balance both requirements, while providing designers with information that enables them to "design around" potential trouble spots in both today's and tomorrow's environment to ensure an exceptional level of built-in quality. The article highlights some of the innovations IBM is developing, such as variation-aware and statistical timing, faster serial and parallel processing, more highly integrated data models and tools, and concurrent chip and package design, which optimise the competing requirements of simultaneously reducing design turnaround time and achieving single-pass design success, while effectively managing the technical challenges associated with nanometer designs. |
| Sponsorship | European Design and Autom. Assoc. EDA Consortium IEEE Comput. Soc. TTTC, IEEE Comput. Soc. DATC, ECSI, ACM SIGDA, RAS |
| File Size | 52609 |
| File Format | |
| ISBN | 0769522882 |
| ISSN | 15301591 |
| DOI | 10.1109/DATE.2005.283 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-03-07 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Time to market Process design Application specific integrated circuits Market opportunities Design automation Technological innovation Timing Parallel processing Data models Packaging |
| Content Type | Text |
| Resource Type | Article |
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