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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Zhong Wang Jianwen Zhu |
| Copyright Year | 2003 |
| Description | Author affiliation: Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada (Zhong Wang; Jianwen Zhu) |
| Abstract | While fast timing analysis methods, such as asymptotic waveform evaluation (AWE), have been well established for linear circuits, the timing analysis for non-linear circuits, which are dominant in digital CMOS circuits, is usually, performed by a SPICE like, time domain integration based approach, involving expensive Newton Raphson iterations at numerous time steps. In this paper we propose a new technique that leads to the transient solution of charge/discharge paths with a complexity equivalent to only K DC operating point calculations, where K is the number of transistors along the path. This is accomplished by approximating each nodal voltage as a piecewise quadratic waveform, whose characteristics can be determined by matching the charge/discharge currents. Experiments on a wide range of circuits show that a 31.6 times speed-up over SPICE transient simulation with 10 ps step size can be achieved, while maintaining an average accuracy of 99%. |
| Sponsorship | EDAA EDA Consortium IEEE Comput. Soc. TTTC IEEE Comput. Soc. DATC ECSI ACM/SIGDA RAS |
| Starting Page | 1026 |
| Ending Page | 1031 |
| File Size | 300931 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769518702 |
| ISSN | 15301591 |
| DOI | 10.1109/DATE.2003.1253739 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-03-07 |
| Publisher Place | Germany |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Timing Performance analysis SPICE Linear circuits Circuit analysis CMOS digital integrated circuits Performance evaluation Time domain analysis Voltage Circuit simulation |
| Content Type | Text |
| Resource Type | Article |
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