NDLI: New performance driven routing techniques with explicit area/delay tradeoff and simultaneous wire sizing

Content Provider	IEEE Xplore Digital Library
Author	Lillis, J. Chung-Kuan Cheng Ting-Ting Y. Lin Ching-Yen Ho
Copyright Year	1996
Description	Author affiliation: Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA (Lillis, J.)
Abstract	We present new algorithms for construction of performance driven Rectilinear Steiner Trees under the Elmore delay model. Our algorithms represent a departure from previous approaches in that we derive an explicit area/delay trade-off curve. We achieve this goal by limiting the solution space to the set of topologies induced by a permutation on the sinks of the net. This constraint allows efficient identification of optimal solutions while still providing a rich solution space. We also incorporate simultaneous wire sizing. Our technique consistently produces topologies equalling the performance of previous approaches with substantially less area overhead.
Starting Page	395
Ending Page	400
File Size	685098
Page Count	6
File Format	PDF
ISBN	0780332946
ISSN	0738100X
DOI	10.1109/DAC.1996.545608
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Routing Wire Topology Permission Delay effects Large scale integration Logic Very large scale integration Delay lines Solid modeling
Content Type	Text
Resource Type	Article

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New performance driven routing techniques with explicit area/delay tradeoff and simultaneous wire sizing