NDLI: Calculating the effective capacitance for the RC interconnect in VDSM technologies

Content Provider	IEEE Xplore Digital Library
Author	Abbaspour, S. Pedram, M.
Copyright Year	2003
Description	Author affiliation: Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA (Abbaspour, S.; Pedram, M.)
Abstract	In this paper, we present a new technique for calculating an effective capacitance of an RC interconnect line in very deep submicron design technologies. The calculation scheme guarantees that the effective capacitance model simultaneously matches both the 50% propagation delay and the 0-to-0.8 V/sub dd/ output transition behavior of a standard cell driving an RC interconnect. Experimental results show that the new technique exhibits high accuracy (less than 5% error) and high efficiency (converges in two or at most three iterations). The paper also includes extensions to handle complex cells as drivers of the RC interconnect.
Sponsorship	IEEE Circuits & Syst. Soc. ACM SIGDA IEICE (Inst. Electon., Inf. & Commun. Eng.) IPSJ (Inf. Process. Soc. Japan)
Starting Page	43
Ending Page	48
File Size	526776
Page Count	6
File Format	PDF
ISBN	0780376595
DOI	10.1109/ASPDAC.2003.1194991
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-01-24
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Capacitance Propagation delay Integrated circuit interconnections Delay effects Switches Piecewise linear approximation Voltage Application specific integrated circuits Libraries Design engineering
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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