NDLI: Functional partitioning for low power distributed systems of systems-on-a-chip

Content Provider	IEEE Xplore Digital Library
Author	Yunsi Fei Jha, N.K.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. Eng., Princeton Univ., NJ, USA (Yunsi Fei)
Abstract	In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The system level specification is assumed to be given as a set of task graphs. The goal is to partition the task graphs so that each partitioned segment is implemented as an SOC and the embedded system is realized as a distributed system of SOCs. Unlike most previous synthesis and partitioning tools, this technique merges partitioning and system synthesis (allocation, assignment, and scheduling) into one integrated process; both are implemented within a genetic algorithm. Genetic algorithms can escape local minima and explore the partitioning and synthesis design space efficiently. Through integration with an existing SOC synthesis tool, the proposed partitioning technique satisfies both the hard real-time constraints and the SOC area constraint of each partitioned segment. Under these constraints, our tool performs multi-objective optimization. Thus, with a single run of the tool, it produces multiple distributed SOC-based embedded system architectures that trade off the overall distributed system price and power consumption. Experimental results show the efficacy of our technique.
Sponsorship	VLSI Soc. India (VSI)
Starting Page	274
Ending Page	281
File Size	283707
Page Count	8
File Format	PDF
ISBN	0769514413
DOI	10.1109/ASPDAC.2002.994934
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-01-11
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System-on-a-chip Embedded system Integrated circuit synthesis Genetic algorithms Constraint optimization Energy consumption Engines Real time systems Algorithm design and analysis Geometry
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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