NDLI: Thermal models characterization for reliable temperature capping and performance optimization in Multiprocessor Systems on Chip

Content Provider	IEEE Xplore Digital Library
Author	Tilli, A. Garone, E. Cacciari, M. Bartolini, A.
Copyright Year	2012
Description	Author affiliation: Univ. Libre de Bruxelles, Brussels, Belgium (Garone, E.) \|\| Dept. of Electron., Comput. Eng. & Syst. (DEIS), Univ. of Bologna, Bologna, Italy (Tilli, A.; Cacciari, M.; Bartolini, A.)
Abstract	Modern Multiprocessor Systems-on-Chip (MP-SoC) offer high computing performance at the expense of huge power densities unevenly distributed on the chip. This generates hot spots that may cause performance and reliability degradations as well as power consumption increases. In recent years several thermal control strategies have been developed to avoid the occurrences of these hot spots. In particular, schemes based on Model Predictive Control (MPC) theory represent the actual state-of-the-art due to their capability to explicitly deal with constraints. In this paper we discuss some important properties for the design of predictive controllers with constraints for the class of thermal system. Starting from the general partial differential equation representing the heat diffusion in a solid, the feasibility and a useful property for the reduction of the number of constraints are proven. Moreover, exploiting theoretical results, a two layers control architecture is presented, which is capable of ensuring feasibility in every circumstance. Simulative results show the benefits of this approach.
Sponsorship	IEEE Control Syst. Soc.
Starting Page	4721
Ending Page	4726
File Size	311521
Page Count	6
File Format	PDF
ISBN	9781457710957
ISSN	07431619
e-ISBN	9781457710964
e-ISBN	9781467321020
DOI	10.1109/ACC.2012.6314827
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-06-27
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	American Automatic Control Council(AACC)
Subject Keyword	Heating Temperature measurement Safety Computational modeling Predictive models Mathematical model
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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