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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Miyashita, K. Ichikawa, S. Nakao, Y. Shimataka, N. Otuki, T. |
| Copyright Year | 2001 |
| Description | Author affiliation: Asahi-Kasei Microsyst. Co. Ltd., Kanagawa, Japan (Miyashita, K.) |
| Abstract | This paper describes a full CMOS Japanese-CDMA/AMPS dual mode intermediatefrequency (IF)-baseband receiver developed in a mature 0.6 /spl mu/m double-poly triple-metal technology. IF automatic gain control (AGC) block has over 90 dB dynamic range with no attenuator or source degeneration resistor required. Provided with such architecture, this receiver displayed both high linearity and low noise performance. An overall maximum gain of more than 90 dB and the noise figure were 10 dB. Third-order input intercept point (IIP3) was 11 dBm with respect to 500 ohm. This super high IIP3 receiver consumes only 24 mA for CDMA mode and 18 mA for AMPS mode. Standby current is less than 1 uA. |
| Sponsorship | IEEE Circuits & Syst. Soc |
| Starting Page | 690 |
| Ending Page | 693 |
| File Size | 452379 |
| Page Count | 4 |
| File Format | |
| ISBN | 0780366859 |
| DOI | 10.1109/ISCAS.2001.922331 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-05-06 |
| Publisher Place | Australia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Linearity Equations Impedance MOSFETs Transconductance Filters Multiaccess communication Topology Performance gain Intrusion detection |
| Content Type | Text |
| Resource Type | Article |
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