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Content Provider | IEEE Xplore Digital Library |
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Author | Sang-Ho Lee Chan Kim Jae-Geun Kim |
Copyright Year | 1999 |
Description | Author affiliation: Switching & Transmission Technol. Lab., ETRI, Taejon, South Korea (Sang-Ho Lee) |
Abstract | As the various types of application services are increased in the ATM (asynchronous transfer mode) network, it becomes a very important requirement for ATM network equipment to provide for higher transfer rate and to detect the network failure or the service degradation. In order to meet these requirements we developed a monolithic single chip device which can handle VPI/VCI address translation, routing, UPC (usage parameter control), QOS (quality of service) buffering, ABR (available bit rate) processing and OAM (operation and management) processing for 65,536 VCs (virtual circuits) in real time. This paper describes architectural design and implementation of a 622 Mbps ATM layer ASIC (application specific integrated circuit). This ASIC is applicable to develop the network equipment in B-ISDN. This supports both NNI (network-network interface) and UNI (user-network interface). |
Starting Page | 37 |
Ending Page | 40 |
File Size | 298959 |
Page Count | 4 |
File Format | |
ISBN | 0780357051 |
DOI | 10.1109/APASIC.1999.824023 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 1999-08-23 |
Publisher Place | South Korea |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Cost function Asynchronous transfer mode Application specific integrated circuits Routing Switches Scheduling algorithm Degradation Network interfaces Bandwidth Design methodology |
Content Type | Text |
Resource Type | Article |
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