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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Wigley, N. Jullien, G.A. |
| Copyright Year | 1990 |
| Description | Author affiliation: Windsor Univ., Ont., Canada (Wigley, N.; Jullien, G.A.) |
| Abstract | The disadvantage of computations using finite rings is the need to compute over many different rings in order to produce useful dynamic ranges of computation. By mapping integers into polynomial rings, one can replace the different rings by the replication of the same ring with considerable computational advantages. The authors present the methodology of such a mapping strategy, and discuss the application of the features of the technique to dense fabrication strategies such as WSI and ULSI, where redundancy is an integral part of the architecture. It is shown that all of the operations can be performed by the recently introduced bit-steered ROM technique, with attendant advantages of easy testability and fault detection. The polynomial mapping strategy allows the extra advantage of low-overhead redundancy when general computational blocks are employed.< |
| Starting Page | 284 |
| Ending Page | 295 |
| File Size | 569850 |
| Page Count | 12 |
| File Format | |
| ISBN | 0818690895 |
| DOI | 10.1109/ASAP.1990.145465 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1990-09-05 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Array signal processing Polynomials Redundancy Dynamic range Fabrication Ultra large scale integration Computer architecture Performance evaluation Read only memory Testing |
| Content Type | Text |
| Resource Type | Article |
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