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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Scheiman, C.J. Cappello, P.R. |
| Copyright Year | 1990 |
| Description | Author affiliation: Dept. of Comput. Sci., California Univ., Santa Barbara, CA, USA (Scheiman, C.J.; Cappello, P.R.) |
| Abstract | A directed acyclic graph (DAG) model of algorithms is used. For a given DAG the authors focus on processor-time minimal multiprocessor schedules: time minimal multiprocessor schedules that use as few processors as possible. The Kung, Lo and Lewis (KLL) algorithm (S.-Y. Kung et al., 1987) for computing the transitive closure of a relation over a set of n elements requires at least 5n-4 steps. Their systolic array comprises n/sup 2/ processing elements. Here, it first is shown that any multiprocessor that achieves this 5n-4 time bound needs at least (n/sup 2//3) processing elements. Then, a processor-time minimal systolic array realizing the KLL algorithm's DAG is constructed. Its (n/sup 2//3) processing elements are organized as a cylindrically connected 2-D mesh, when n identical to 0 mod 3. When n is not identical to 0 mod 3, the 2-D mesh is connected as a twisted torus.< |
| Starting Page | 19 |
| Ending Page | 30 |
| File Size | 541216 |
| Page Count | 12 |
| File Format | |
| ISBN | 0818690895 |
| DOI | 10.1109/ASAP.1990.145439 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1990-09-05 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Systolic arrays Processor scheduling Difference equations Computer science Linearity Constraint optimization NP-complete problem Routing Tree graphs Hypercubes |
| Content Type | Text |
| Resource Type | Article |
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