NDLI: Response of head suspension interconnect at 1 GHz

Content Provider	IEEE Xplore Digital Library
Author	George, P.K. Jury, J. Judy, J.H.
Copyright Year	1965
Abstract	The results of PSPICE simulations of suspension interconnects connecting ultra-fast write drivers to a write head capable of 1 GHz electronic reversal time are reported. The suspension interconnect is modeled as a distributed lumped circuit with parameters obtained from FEM-based simulations and include the effects of eddy currents. An ideal write-current driver in parallel with a capacitor and a damping resistor are assumed. Studies of the flux rise-time and flux pulse-shape are made varying the driver impedances and the geometries of the interconnects. Rise-times as low as 1ns are demonstrated which correspond to the isolated head capability at 60 ma. Implications with respect to interconnect design are discussed.
Sponsorship	IEEE Magnetics Society
Starting Page	2247
Ending Page	2249
Page Count	3
File Size	325989
File Format	PDF
ISSN	00189464
Volume Number	35
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-09-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Integrated circuit interconnections Driver circuits Circuit simulation SPICE Joining processes Eddy currents Capacitors Damping Resistors Impedance
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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