NDLI: Crosstalk Analysis for a CMOS-Gate-Driven Coupled Interconnects

Content Provider	IEEE Xplore Digital Library
Author	Kaushik, B.K. Sarkar, S.
Copyright Year	1982
Abstract	This paper deals in crosstalk analysis of a CMOS-gate-driven capacitively and inductively coupled interconnect. Alpha power-law model of a MOS transistor is used to represent a CMOS driver. This is combined with a transmission-line-based coupled-interconnect model to develop a composite driver-interconnect-load model for analytical purposes. On this basis, a transient analysis of crosstalk noise is carried out. Comparison of the analytical results with SPICE extracted results shows that the average error involved in estimating noise peak and their time of occurrence is less than 7%.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1150
Ending Page	1154
Page Count	5
File Size	476199
File Format	PDF
ISSN	02780070
Volume Number	27
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-06-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Crosstalk Semiconductor device modeling Couplings Analytical models Driver circuits SPICE Inductance Resistors Integrated circuit interconnections MOSFETs transmission lines Coupling crosstalk noise inductance integrated-circuit interconnect signal integrity
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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