NDLI: An FPGA-Based TDC for Free Space Quantum Key Distribution

Content Provider	IEEE Xplore Digital Library
Author	Qi Shen Shengkai Liao Shubin Liu Jinhong Wang Weiyue Liu Chengzhi Peng Qi An
Copyright Year	1963
Abstract	Quantum key distribution (QKD) is the most matured application of quantum communication. The time synchronization and system timing jitter are essential to a practical QKD experiment, which can directly influence the quantum bit error rate (QBER) and the final key rate. High precision time-to-digital converters (TDCs) can effectively reduce the system timing jitter, resulting in lower QBER and higher key rate. Here, we introduce a TDC based on a field programmable gate array (FPGA). Its high resolution (LSB) of 50 ps with precision (RMS) less than 50 ps, low dead time and large dynamic range can well meet the requirement of the QKD experiment. A free space QKD system setup using the FPGA-based TDC has been assembled. The timing precision of the synchronous light and the system timing jitter were determined. The results demonstrate that the FPGA-based TDC could be successfully applied in the QKD experiment.
Sponsorship	IEEE Nuclear and Plasma Sciences Society Computer Applications in Nuclear and Plasma Sciences (CANPS) Lawrence Berkeley Lab. Lawrence Livermore Nat. Lab. APS College of William and Mary Continuous Electron Beam Accelerator Facility NASA Defence Nuclear Agency Sandia National Laboratories Jet Propulsion Laboratory Brookhaven Nat. Lab. Lawrence Livermore Nat. Lab IEEE/NPPS Radiat. Effects Committee Defence Nuclear Agency/DoD Sandia National Laboratories/DOE Jet Propulsion Laboratory/NASA Phillips Lab./DoD
Starting Page	3570
Ending Page	3577
Page Count	8
File Size	730628
File Format	PDF
ISSN	00189499
Volume Number	60
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Timing jitter Synchronization Clocks Educational institutions Laser beams time-to-digital converter Field programmable gate arrays (FPGAs) quantum key distribution time measurement
Content Type	Text
Resource Type	Article
Subject	Nuclear and High Energy Physics Electrical and Electronic Engineering Nuclear Energy and Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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