NDLI: The Readout Electronics of the Micromegas-Based Large Time Projection Chamber Prototype for the International Linear Collider

Content Provider	IEEE Xplore Digital Library
Author	Attie, D. Besin, D. Calvet, D. Colas, P. Joannes, R. Le Coguie, A. Lhenoret, S. Mandjavidze, I. Riallot, M. Wang, W. Zonca, E.
Copyright Year	1963
Abstract	This work presents the design, implementation and test of prototype modules of a Time Projection Chamber based on Micromegas amplification technology which was built in view of the future International Linear Collider. The main goals of this development are to investigate the performance of the detector and to demonstrate the feasibility of extremely compact and low power readout electronics. We based the front-end electronics on the AFTER chip, a 72-channel ASIC originally built for the T2K experiment, and integrated it with new hardware, mechanics and cooling to read out the 1728 channels of a detector module while staying confined in the available area of ~ 220 cm². The digital part of a module is based on a Xilinx Virtex-5 FPGA which interfaces to the 24 AFTER chips used for the readout. We present the operation of a vertical slice of the complete detector and readout system. In particular, our tests show that the resistive anode of the Micromegas detector, which is primarily designed to improve tracking resolution, allows operation without the spark protection circuit normally required on each readout channel.
Sponsorship	IEEE Nuclear and Plasma Sciences Society Computer Applications in Nuclear and Plasma Sciences (CANPS) Lawrence Berkeley Lab. Lawrence Livermore Nat. Lab. APS College of William and Mary Continuous Electron Beam Accelerator Facility NASA Defence Nuclear Agency Sandia National Laboratories Jet Propulsion Laboratory Brookhaven Nat. Lab. Lawrence Livermore Nat. Lab IEEE/NPPS Radiat. Effects Committee Defence Nuclear Agency/DoD Sandia National Laboratories/DOE Jet Propulsion Laboratory/NASA Phillips Lab./DoD
Starting Page	3491
Ending Page	3496
Page Count	6
File Size	882780
File Format	PDF
ISSN	00189499
Volume Number	60
Issue Number	5
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Detectors Field programmable gate arrays Prototypes Universal Serial Bus Hardware Readout electronics Clocks time projection chambers Data acquisition FPGA
Content Type	Text
Resource Type	Article
Subject	Nuclear and High Energy Physics Electrical and Electronic Engineering Nuclear Energy and Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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