NDLI: Circuits resilient to additive attacks with applications to secure computation

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Circuits resilient to additive attacks with applications to secure computation

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Circuits resilient to additive attacks with applications to secure computation

Content Provider	ACM Digital Library
Author	Genkin, Daniel Ishai, Yuval Sahai, Amit Prabhakaran, Manoj M. Tromer, Eran
Abstract	We study the question of protecting arithmetic circuits against additive attacks, which can add an arbitrary fixed value to each wire in the circuit. This extends the notion of algebraic manipulation detection (AMD) codes, which protect information against additive attacks, to that of AMD circuits which protect computation. We present a construction of such AMD circuits: any arithmetic circuit C over a finite field F can be converted into a functionally-equivalent randomized arithmetic circuit • C of size O(\|C\|) that is fault-tolerant in the following sense. For any additive attack on the wires of C, its effect on the output of C can be simulated, up to O(\|C\|/\|F\|) statistical distance, by an additive attack on just the input and output. Given a small tamper-proof encoder/decoder for AMD codes, the input and output can be protected as well. We also give an alternative construction, applicable to small fields (for example, to protect Boolean circuits against wire-toggling attacks). It uses a small tamper-proof decoder to ensure that, except with negligible failure probability, either the output is correct or tampering is detected. Our study of AMD circuits is motivated by simplifying and improving protocols for secure multiparty computation (MPC). Typically, securing MPC protocols against active adversaries is much more difficult than securing them against passive adversaries. We observe that in simple passive-secure MPC protocols for circuit evaluation, the effect of any active adversary corresponds precisely to an additive attack on the original circuit's wires. Thus, to securely evaluate a circuit C in the presence of active adversaries, it suffices to apply the passive-secure protocol to C. We use this methodology to simplify feasibility results and attain efficiency improvements in several standard MPC models.
Starting Page	495
Ending Page	504
Page Count	10
File Format	PDF MP4
ISBN	9781450327107
DOI	10.1145/2591796.2591861
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2014-05-31
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Fault tolerant circuits Cryptography Secure computation
Content Type	Audio Text
Resource Type	Article

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